The TV picture wasn't a complete mess, there was a red rectangle of sorts in the middle of the screen and the width looked about right, but the whole picture was rapidly flickering and rolling up and down.
Clearly a synchronisation issue, which wasn't much of a guess as that was all I was basically testing!
Frowning, I disconnected the HSync signal from the composite sync circuit. The display disintegrated further, I lost anything resembling left and right edges of the rectangle. I put the signal back.
Next I disconnected the VSync signal. The picture didn't get much worse but rolled even more frantically! Was this a VSync problem?
I unplugged from the TV and plugged my oscilloscope into the composite sync output. The long 30us VSync pulses were a mess. This was strange as they had checked out whilst I was building the circuit. With the other probe I checked the 30us VSync End pulses. These looked good so I moved the probe over to the VSync Start pulses (VCclk) to check these. As soon as I clipped the probe onto this signal the Long 30us pulses in the composite sync output corrected themselves!
Very Very strange. Probe clipped to VCclk and the VSync pulses were accurate, unclipped and the timing was way off. It occurred to me that even though these probes have a high impedance they are also loaded with a few pico farads capacitance. I disconnected the probe from the oscilloscope but left it clipped between ground and VCclk. The VSync signal was perfect.
So I disconnected the probe and connected a 100pf capacitor between VCclk and GND instead. This also restored the VSync signal! A pull-up resistor had no effect. I was really keen to see if there was any noise on VCclk or there was insufficient oomph to clock the 74HC4040, but connecting a probe to the VCclk line resolves the problem and the trace looks very clean.
That done I disconnected the scope, reconnected the SCART lead to the TV and switched it on.
I was very pleased to see the following picture:
My only grumble is that the display rectangle is a little too far over to the right hand side of the screen.
You can download the second version of the vertical control schematic (Version 1.2) with the delayed VSync start signal and VCclk capacitor here.