The ZX Spectrum Reverse Engineering and Clone Desgin Blog


A site dedicated to the reverse engineering of the ZX Spectrum and related projects.

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Vertical Control

Mar 25, 2007

I've been looking at the specifications for PAL vertical synchronisation signals, and it looks straightforward enough. The vertical sync is a sequence of short, long then short active low pulses. The duty cycle of each is 32us, so are exactly half a scanline in length.

Television pictures are normally made up of two interlaced frames or fields. It is not usual for a computer generated picture to be interlaced as this causes a lot of vertical jitter as the fields swap, instead one field is produced continuously. Which field depends on the exact sequence of pulses that are generated for the vertical sync. This link and also here contain some excellent information regarding television vertical synchronisation.

The ZX Spectrum display may be divided up vertically as:

Row Start Row End Length Description
0191192Video Display
19224756Bottom Border
2482558Vertical Sync
25631256Top Border

All these figures turn out to be nicely rounded into multiples of 8, which is probably not by accident. From this list it is clear that we need to generate a VerticalBorder signal (in fact I've already worked out that we'll need this to generate an overall border, as shown on the horizontal schematic), and a vertical sync period signal. If neither of these are active, then we must be within the video display rows.

Our horizontal control design defines the left hand edge of the display area as the start of the scan line (Horizontal Counter at zero). As far as the display device is concerned (TV/monitor) the scanline starts with the horizontal sync. We will probably have to use the HSync to clock our vertical scanline counter.