I've finished prototyping the horizontal display circuit and have produced a number of scope pictures showing the relative timings so we can compare against our specification.
The Prototype
This is a picture of the prototype itself. I'll label which chip is which sometime.....
Bottom right is the 14MHz, 7MHz, 3.5MHz oscillator. To the left of that are the 4 bit counters. Top left are the three 4bit comparators, to the right of them is the 3 to 8 line demux followed by various AND OR and NAND gates. Click here for a larger picture (opens in another window).
Blank Period
This picture shows the blanking period timing coming out at 13.7us. The trace below that is the HSync pulse, which we will measure next.
Blank Period
This shows the HSync pulse which does come out at 4.6us as expected. Notice that contrary to the PAL specification, there is no front-porch delay before the pulse. In practise we may need to introduce one.
Delayed HC8 - PIXen
This picture shows a raw HC8 trace and a delayed HC8 trace. The two traces at the top are the actual traces, the bright sections are magnified and displayed as the bottom two traces.
AL2 and Delayed HC8 relationship
This picture shows the delayed HC8 signal going low after the low to high transition of AL2, which is just what we were after.
Line Period
This picture shows the complete line period, measured from the start of one HSync pulse to the next. As you can see it is exactly 64us.
