The ZX Spectrum Reverse Engineering and Clone Desgin Blog


A site dedicated to the reverse engineering of the ZX Spectrum and related projects.

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Video Simplification - Minimal Vertical Sync

Nov 23, 2007

Up to now we have focused on generating a broadcast specification vertical sync signal. The ZX Spectrum does not do this, but applies a cheat that has been found to reset the television analogue vertical sync oscillator to the start of field one.

With today's digital televisions the VSync cheat is not guaranteed to work, it does however drastically reduce the number of gates required to implement the vertical sync.

Normally the vertical sync lasts for eight scan lines, and consists of sixteen pulses of either 2us or 30us, one every 32us. The cheap vertical sync is achieved for holding the VSync low for 4 scanlines (4 x 64us). It is very simple, and enough to reset an analogue VSync oscillator.

The modified vertical sync circuit consists of the scanline counter, clocked once per scanline by HBlank, and the same VSyncEn and VBorder generator as the full VSync implementation - except that VC3-8 are used instead of VC4-9, as now we're counting whole lines not half-lines.

As we want a VSync signal that spans four scanlines, we can use (VC2 + VSyncEn) as VSyncEn is active only during the normal sync period, and VC2 prevents it lasting longer than four scanlines.

As the composite sync generator in videoout 1.17 ORs VSyncEn and VSyncRaw, we can produce VSyncRaw from VC2 to get our 4 scanline vertical sync.

The simplified vertical sync is shown in vertvideoSimple-1.17.

Thanks to Grant Searle ( for implementing this cheat, sending me his modification, and proving it works!